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c8051F040液晶显示程序

c8051F040液晶显示程序

点击数:7507 次   录入时间:03-04 11:49:50   整理:http://www.55dianzi.com   51单片机
sfr PCA0CPH5 = 0xE2;    /* PCA 0 MODULE 5 CAPTURE/COMPARE - HIGH BYTE   */
sfr XBR1     = 0xE2;    /* CROSSBAR CONFIGURATION REGISTER 1            */
sfr XBR2     = 0xE3;    /* CROSSBAR CONFIGURATION REGISTER 2            */
sfr XBR3     = 0xE4;    /* CROSSBAR CONFIGURATION REGISTER 3            */
sfr EIE1     = 0xE6;    /* EXTERNAL INTERRUPT ENABLE 1                  */
sfr EIE2     = 0xE7;    /* EXTERNAL INTERRUPT ENABLE 2                  */
sfr ADC0CN   = 0xE8;    /* ADC 0 CONTROL                                */
sfr ADC2CN   = 0xE8;    /* ADC 2 CONTROL                                */
sfr P6       = 0xE8;    /* PORT 6                                       */
sfr PCA0CPL2 = 0xE9;    /* PCA 0 MODULE 2 CAPTURE/COMPARE - LOW BYTE    */
sfr PCA0CPH2 = 0xEA;    /* PCA 0 MODULE 2 CAPTURE/COMPARE - HIGH BYTE   */
sfr PCA0CPL3 = 0xEB;    /* PCA 0 MODULE 3 CAPTURE/COMPARE - LOW BYTE    */
sfr PCA0CPH3 = 0xEC;    /* PCA 0 MODULE 3 CAPTURE/COMPARE - HIGH BYTE   */
sfr PCA0CPL4 = 0xED;    /* PCA 0 MODULE 4 CAPTURE/COMPARE - LOW BYTE    */
sfr PCA0CPH4 = 0xEE;    /* PCA 0 MODULE 4 CAPTURE/COMPARE - HIGH BYTE   */
sfr RSTSRC   = 0xEF;    /* RESET SOURCE                                 */
sfr B        = 0xF0;    /* B REGISTER                                   */
sfr EIP1     = 0xF6;    /* EXTERNAL INTERRUPT PRIORITY REGISTER 1       */
sfr EIP2     = 0xF7;    /* EXTERNAL INTERRUPT PRIORITY REGISTER 2       */
sfr SPI0CN   = 0xF8;    /* SPI 0 CONTROL                                */
sfr CAN0CN   = 0xF8;    /* CAN 0 CONTROL                                */
sfr P7       = 0xF8;    /* PORT 7                                       */
sfr PCA0L    = 0xF9;    /* PCA 0 TIMER - LOW BYTE                       */
sfr PCA0H    = 0xFA;    /* PCA 0 TIMER - HIGH BYTE                      */
sfr PCA0CPL0 = 0xFB;    /* PCA 0 MODULE 0 CAPTURE/COMPARE - LOW BYTE    */
sfr PCA0CPH0 = 0xFC;    /* PCA 0 MODULE 0 CAPTURE/COMPARE - HIGH BYTE   */
sfr PCA0CPL1 = 0xFD;    /* PCA 0 MODULE 1 CAPTURE/COMPARE - LOW BYTE    */
sfr PCA0CPH1 = 0xFE;    /* PCA 0 MODULE 1 CAPTURE/COMPARE - HIGH BYTE   */
sfr WDTCN    = 0xFF;    /* WATCHDOG TIMER CONTROL                       */


/*  BIT Registers  */

/*  TCON  0x88 */
sbit TF1   = TCON ^ 7;              /* TIMER 1 OVERFLOW FLAG      */
sbit TR1   = TCON ^ 6;              /* TIMER 1 ON/OFF CONTROL     */
sbit TF0   = TCON ^ 5;              /* TIMER 0 OVERFLOW FLAG      */
sbit TR0   = TCON ^ 4;              /* TIMER 0 ON/OFF CONTROL     */
sbit IE1   = TCON ^ 3;              /* EXT. INTERRUPT 1 EDGE FLAG */
sbit IT1   = TCON ^ 2;              /* EXT. INTERRUPT 1 TYPE      */
sbit IE0   = TCON ^ 1;              /* EXT. INTERRUPT 0 EDGE FLAG */
sbit IT0   = TCON ^ 0;              /* EXT. INTERRUPT 0 TYPE      */

/*  CPT0CN  0x88 */
sbit CP0EN   = CPT0CN ^ 7;          /* COMPARATOR 0 ENABLE                 */
sbit CP0OUT  = CPT0CN ^ 6;          /* COMPARATOR 0 OUTPUT                 */
sbit CP0RIF  = CPT0CN ^ 5;          /* COMPARATOR 0 RISING EDGE INTERRUPT  */
sbit CP0FIF  = CPT0CN ^ 4;          /* COMPARATOR 0 FALLING EDGE INTERRUPT */
sbit CP0HYP1 = CPT0CN ^ 3;          /* COMPARATOR 0 POSITIVE HYSTERESIS 1  */
sbit CP0HYP0 = CPT0CN ^ 2;          /* COMPARATOR 0 POSITIVE HYSTERESIS 0  */
sbit CP0HYN1 = CPT0CN ^ 1;          /* COMPARATOR 0 NEGATIVE HYSTERESIS 1  */
sbit CP0HYN0 = CPT0CN ^ 0;          /* COMPARATOR 0 NEGATIVE HYSTERESIS 0  */

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